ICD-LLIR Low-Level Intermediate Representation
Some analyses and optimizations of a compiler can only be performed
on the assembly level of the application. To avoid having to
re-implement these algorithms for every considered target
architecture, ICD/ES has developed ICD-LLIR, a retargetable Low-Level
Intermediate Representation. In this way, standard assembly-level
analyses and optimizations only need to be implemented once and are
automatically available when ICD-LLIR has been retargeted to a new
target architecture.
ICD-LLIR has the following main characteristics:
- Retargetable Compiler Back-End, in practical use for
- TriCore DSP processor
- Infineon Technologies Network Processor
- Includes standard analyses and optimizations
- Automatic generation of assembly language parser from the
architecture description
- Full support for user-specified pragmas
- Output formats:
- Assembly code to be passed to the assembler
- Human-readable LLIR-Represenation output format containing
additional information, e.g. from DEF/USE analysis or register
allocation
- C++ class library to access information stored in the LLIR
- Suitable for Stand-Alone Post-Pass-Optimizers due to its ability to read and write assembly code
Please contact us to
learn more about ICD-LLIR.